;**************************************************
; Copyright (c) 2013 ARM Ltd.  All rights reserved.
;**************************************************

; Scatter-file for RAM based example on Altera Cyclone V

; This scatter-file places application code, data, stack and heap at suitable addresses in the memory map.

SDRAM 0x02000000
{
    APP_CODE +0
    {
	    * (STARTUP, +FIRST)
        * (+RO, +RW, +ZI)
	}

	G_MemDrvBase  +0 ALIGN 8 EMPTY 0x10000000 {}	; Base addrss of the Memory Drive
	G_MemDrvEnd   +0 ALIGN 8 EMPTY 0          {}	; End address of the Memory Drive
	ARM_LIB_HEAP  +0 ALIGN 8 EMPTY 0x40000	  {}	; Application heap
	ARM_LIB_STACK +0 ALIGN 8 EMPTY 8192		  {}	; Stack for main() (Adam & Eve)
	ABORT_STACKS  +0 ALIGN 8 EMPTY 2*2048	  {}	; Abort mode stack (split across all cores)
	FIQ_STACKS    +0 ALIGN 8 EMPTY 2*2048	  {}	; FIQ   mode stack (split across all cores)
	IRQ_STACKS    +0 ALIGN 8 EMPTY 2*8192	  {}	; IRQ   mode stack (split across all cores)
	SUPER_STACKS  +0 ALIGN 8 EMPTY 2*2048	  {}	; Supervisor mode stack (split across all cores)
	UNDEF_STACKS  +0 ALIGN 8 EMPTY 2*2048	  {}	; Undef mode stack (split across all cores)
}

OCRAM 0xFFE00000 
{
	UNCACHED_DATA +0 ABSOLUTE UNINIT 0x3FFE0
	{
		* (.uncached) 
	}
}
